Excerpt from “HF Radio Systems and Circuits”, Chapter 8 (Digital Signal Processing), pp.349-350. 

(William E. Sabin and Edgar O. Schoenike, editors. Written by members of the Engineering Staff at Rockwell Collins. Published by Noble, 1998)

Figure 8.36 Example HF digital SSB communication receiver block diagram.
Figure 8.36 Example HF digital SSB communication receiver block diagram.


8.10 Digital SSB Receiver Design Example 

Previous sections of this chapter have concentrated mostly on the basic DSP issues and concepts. In this section, a digital SSB receiver design example is presented to pull some of the concepts together in a system-level design. 

In this example, IF bandpass sampling will be used to implement a 2- to 30-MHz HF digital SSB receiver, as illustrated in Figure 8.36. A maximum front-end bandwidth of 16 kHz has been selected, to allow up to four 3-kHz -wide ISB channels to be processed by the DSP. This bandwidth also allows the DSP to perform receiver fine frequency tuning over at least a 1-kHz range, simplifying the variable injection synthesizer. 

The first IF will be 100 MHz, which is high enough to allow the broad band input filter to suppress the IF and image response to 80 dB, but low enough to allow a low-cost crystal filter to provide the 16-kHz-wide front end filtering. 

The variable injection synthesizer will tune the range of 102 to 130 MHz in 1-kHz tuning steps. The DSP can provide the 1-Hz fine-tuning steps required. This "high-side" first-IF mixer injection results in a passband reversal or "flip" in the mixer, which will be corrected in the A/D converter sampling process. 

Following the first-IF crystal filter, the signal is amplified to make up for losses in the first-IF mixer and filter, and to maintain a front-end noise figure of 15 dB. The signal is then mixed with a fixed oscillator signal of 99.544 MHz. This mix produces a second IF of 456 kHz, which is high enough to allow the second-mixer image response at 99.088 MHz to be attenuated by 80 dB in the first-IF filter, but low enough to be sampled by the A/D converter.

Contents copyright © 1998 Noble Publishing Corporation. Page created by A. Farson VA7OJ/AB4OJ.
Last updated: 09/25/19